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                          Call for Papers

        SILM Workshop on the Security of Software/Hardware Interfaces
               Friday, July 12 2024, Vienna (Austria)
                    https://silm-workshop.github.io/

 Co-located with Euro S&P 2024: http://www.ieee-security.org/TC/EuroSP2024/
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It is becoming increasingly important to combine software and hardware
aspects to take new software attacks into account. For example, hardware
vulnerabilities such as Spectre or Meltdown can be exploited purely by
software attacks. Such attacks can be executed remotely and do not require
physical access to the targeted hardware platform. On the other hand,
hardware features can be used to better detect and respond to traditional
software attacks, such as memory corruption. Therefore, it is necessary to
study the security of software/hardware interfaces, both in terms of
attacks and defences.

The purpose of the SILM workshop is to share experiences, tools, and
methodologies to handle security in software/hardware interfaces. On the
one hand, we need to better assess the security guarantees provided by
existing hardware architectures against software attacks, especially
attacks against micro-architecture. This can be achieved by identifying new
vulnerabilities using reverse engineering, fuzzing, or other attack
approaches. On the other hand, we also need to propose new architectures
offering better resilience against software attacks. These architectures
should rely on hardware-based security mechanisms to protect the software
stack. One of the challenges is to formally specify and verify the security
guarantees offered by such architectures.

The goal of this 6th edition of the SILM workshop is to provide a forum
for researchers and practitioners from academia, industry, and government
that work on the security of software/hardware interfaces.

==== Topics of interest include, but are not limited to the following

 * Hardware reverse engineering
 * Microcode security analyses
 * Software side-channel attacks
 * Software attacks against micro-architecture
 * Software-activated fault attacks
 * Hardware-based security mechanisms
 * Software counter-measures against hardware vulnerabilities
 * Formal methods applied to the security of software/hardware interfaces
 * Hardware enclaves
 * Hardware trace mechanisms for security
 * OS and VM introspection

==== Important Dates

 - Submission: March 29, 2024 -- 11:59pm AoE
 - Author Notification: April 30, 2024
 - Camera Ready Version: May 14, 2024
 - Workshop: July 12, 2024

==== Submission and Publication

There are two categories of submissions:

 1. Regular papers describing fully developed work and complete results (10
    pages, references included, IEEE format)

 2. Short papers, position papers, industry experience reports, work-in-
    progress submissions and ideas (6 pages, references included, IEEE format;
    work-in-progress and idea submissions should clearly outline research
    hypothesis, evaluation strategy and potential impact)

All papers must be written in English and describe original work that has
not been published or submitted elsewhere. Our reviewing process is
double-blind and submissions must be anonymous and refer to previous work
in the third person. The submission category (regular paper, short paper)
should be clearly indicated. All submissions will be fully reviewed by
members of the Program Committee.  Papers will appear in IEEE Xplore in a
companion volume to the regular EuroS&P proceedings. Contact the Program
Chairs if you do not want your *short paper* to appear in the proceedings.

Papers must be typeset in LaTeX in A4 format (not “US Letter”) using the
IEEE conference proceeding template we provide:
https://www.ieee-security.org/TC/EuroSP2024/eurosp2023-template.zip
We suggest you first compile the supplied LaTeX source as is, checking that
you obtain the same PDF as the one supplied, and then write your paper into
the LaTeX template, replacing the boilerplate text. Please do not use other
IEEE templates. Failure to adhere to the page limit and formatting
requirements can be grounds for rejection.

For accepted papers, at least one author must attend the workshop.

==== Program Chairs

 - Guillaume Hiet, IRISA, CentraleSupelec/Inria, France
 - Jan Tobias Muehlberg, ULB/KU Leuven, Belgium

Contact email: silm-workshop@inria.fr

=== Publicity

 - Merve Guelmez, Ericsson Research/KU Leuven, Sweden/Belgium

==== Program Committee

 - Pascal Cotret, ENSTA Bretagne
 - Chris Dalton, HP Labs
 - Lesly-Ann Daniel, KU Leuven
 - Merve Guelmez, Ericsson Research/KU Leuven (Publicity)
 - Yuko Hara, Tokyo Institute of Technology
 - Karine Heydemann, LIP6
 - Guillaume Hiet, CentraleSupélec/Inria (Co-Chair)
 - Kevin Cheang, University of California, Berkeley
 - Vianney Lapôtre, Univ. South Brittany
 - Clementine Maurice, CNRS
 - Jan Tobias Muehlberg, Universite Libre de Bruxelles (Co-Chair)
 - Cristofaro Mune, Raelize B.V.
 - Kaveh Razavi, ETH Zurich
 - Simon Rokicki, ENS Rennes
 - Gururaj Saileshwar, University of Toronto
 - Shweta Shinde, ETH Zurich
 - Volker Stolz, HVL
 - Marcus Voelp, Uni Luxembourgh
 - Pierre Wilke, CentraleSupélec/Inria